±1 LSB INL; no missing codes. – Programmable throughput up to ksps. – 8 external inputs; programmable as single-ended or differential. CF Mixed-signal 64KB Isp Flash MCU. ANALOG PERIPHERALS – SAR ADC ± 1 LSB INL Programmable Throughput to ksps to 8 External Inputs;. Silicon Labs CFTB. Explore Integrated Circuits (ICs) on Octopart: the fastest source for datasheets, pricing, specs and availability.

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Product Selection Guide Figure 1. CF Block Diagram Figure 1. CF Block Diagram 1.

Fully Compatible 1. Improved Throughput Figure 1. Additional Features Figure 1.

CF Datasheet(PDF) – Silicon Laboratories

On-Board Clock and Reset 1. On-Chip Memory Figure 1.

On-Chip Memory Map 1. Digital Crossbar Diagram 1. Programmable Counter Array Figure 1. PCA Block Diagram 1. C8015f020 and DACs Figure 1. Comparator and DAC Diagram 2. Global DC Electrical Characteristics 4. Pin Definitions Figure 4.

CF (Silicon Lab.) – 8k Isp Flash Mcu Family | eet

Temperature Sensor Transfer Function 5. ADC Modes of Operation 5. Starting a Conversion 5. Tracking Modes Figure 5. Settling Time Requirements Figure 5.


Right Satasheet Differential Data Figure 5. Left Justified Differential Data Table 5. Temperature Sensor Transfer Function 6. ADC Modes of Operation 6. Starting a Conversion 6. Tracking Modes Figure 6. Settling Time Requirements Figure 6. Right Justified Differential Data Figure 6. Left Justified Differential Data Table 6. Analog Multiplexer and PGA 7. ADC1 Modes of Operation 7.

C8051F020 Datasheet

Starting a Conversion 7. Tracking Modes Figure 7. Settling Time Requirements Figure 7.

ADC1 Electrical Characteristics 8. DAC Output Scheduling 8. Update Output On-Demand 8. Update Output Based on Timer Overflow 8.

DAC Electrical Characteristics 9. Reference Control Register Table 9. Voltage Reference Electrical Characteristics c80051f020 Reference Control Register Table Comparator Functional Block Diagram Figure Comparator Hysteresis Plot Figure Comparator0 Control Register Figure Comparator1 Control Register Table Comparator Electrical Characteristics CIP Block Diagram Instruction and CPU Timing Memory Organization Figure General Purpose Registers Bit Addressable Locations Special Function Registers Table Special Function Registers Register Descriptions Figure Stack Pointer Figure Data Pointer Low Byte Figure Data Pointer High Byte Figure Program Status Word Figure External Datasheef Table Interrupt Register Descriptions Figure Interrupt Enable Figure Interrupt Ratasheet Figure Extended Interrupt Enable 1 Figure Extended Interrupt Enable 2 Figure Extended Interrupt Priority 1 Figure Extended Interrupt Priority 2 Power Management Modes Stop Mode Figure Power-on Reset Figure Software Forced Reset Missing Clock Detector Reset Watchdog Timer Reset Disable WDT Lockout Watchdog Timer Control Register Figure Reset Source Register Table Reset Electrical Characteristics Oscillator Diagram Figure Internal Oscillator Control Register Table Internal Oscillator Electrical Characteristics Figure External Oscillator Control Register External Crystal Example External RC Example External Capacitor Example Non-volatile Data Storage Security Options Figure Configuring the External Memory Interface Port Selection and Configuration Figure External Memory Interface Control Figure External Memory Configuration Multiplexed and Non-multiplexed Selection Multiplexed Configuration Figure Multiplexed Configuration Example Non-multiplexed Configuration Figure Non-multiplexed Configuration Example Memory Mode Selection Figure Split Mode without Bank Select Split Mode with Bank Select